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4: Simulation |
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The Simulation Interface command of the Tools menu is able to produce input specifications for a number of different simulators. All these commands work on the current facet and require that all named points be exports. It is also necessary to have power and ground exports.
The possible simulators include circuit-level (SPICE), switch-level (IRSIM, ESIM, RSIM, RNL, COSMOS, and MOSSIM), gate-level (ABEL-PAL), and functional (VERILOG, TEGAS, and SILOS). In addition, you can generate a deck for the FastHenry inductance analysis system.
To produce an input deck for any of these simulators, use the Write XXX Deck command (where XXX is the simulator's name). In addition to these simulators, an EDIF netlist can be produced with the EDIF (Electronic Design Interchange Format) subcommand of the Export command of the File menu.
Besides generating Verilog decks, it is possible to annotate circuits with additional Verilog declarations and code that will be included in the deck. The subcommands Add VERILOG Code and Add VERILOG Declaration of the Simulation Interface command of the Tools menu allow you to click in the circuit and type code or declarations. These pieces of text can be manipulated like any other text object (see Section 6-8 on text).
Additional control of Verilog deck generation is accomplished with the VERILOG Options... subcommand. A checkbox lets you choose whether or not to use the Verilog "assign" construct. In addition, you can attach disk files with Verilog code to any facet in the library. Once attached, the generated Verilog will use the contents of that file instead of examining the facet contents. This allows you to create your own definitions in situations where the derived Verilog would be too complex or otherwise incorrect. For an example of Verilog layout and code, look at the facet "tool-SimulateVERILOG" in the library "samples.txt" (you can read the library with the Readable Dump subcommand of the Import command of the File menu).
SPICE circuit simulation is a special case in Electric. Since the simulator is not interactive, all specifications must be done graphically, in advance. Note that the example shown here is available in the "samples.txt" library as facet "tool-SimulateSPICE" (you can read the library with the Readable Dump subcommand of the Import command of the File menu).
All input values to SPICE are controlled with Source nodes,
found in the New SPICE Part command of the Edit menu.
These parts are also available from the "Spice" button in the component menu of the Schematics
technologies.
There are both voltage and current sources. For example, to create a 5-volt supply, use the Voltage Source subcommand, provide the SPICE fragment "DC 5", and connect it to the power and ground exports of the circuit. To create a piecewise linear input signal, use the same component, connected between ground and the input export, and provide the SPICE fragment, for example "PWL(0NS 0 3NS 0 4NS 5)" (this sets the input to 0 volts from 0 to 3 nanoseconds, and ramps it up to 5 volts from 3 to 4 nanoseconds). | ![]() |
All output values requested of SPICE are controlled with Meter nodes. The Voltage Meter subcommand will place a node that can be wired between an output export and ground to measure the difference. The Current Meter subcommand creates a source that records the current output. For SPICE 2 and SPICE 3, these meter nodes must be used for any signal whose value you wish to examine. For HSPICE, all signal values are available, and those with meter nodes will be shown initially.
It is possible to specify Transient, DC, or AC analysis by using the Transient Analysis, DC Analysis, and AC Analysis subcommands. The transient analysis node in the example was given the "TRAN" card fragment ".2NS 7NS 0NS .2NS". The DC Analysis node is connected to the loop point and given a SPICE fragment, for example "0V 5V .1V".
Transistors sometimes require special care when modeling them in SPICE. This is because they not only have connections to a source, gate, and drain, but also have substrate connections (or "body" or "well", depending on the usage). Typically this is connected to power or ground (P-transistors have their substrate connected to power, and N-transistors have their substrate connected to ground). This can be overridden by using the Bulk Declaration subcommand to create a special node. The two ports on the Bulk node must be connected to two networks. The network connected on top (the + side) will be used as the substrate in P-transistors (it is the N-well substrate). The network on the bottom (the - side) will be used as the substrate in N-transistors (it is the P-well substrate). There can be only one Bulk node in any facet.
Another option that can be used when modeling transistors and other component is to set a specific SPICE model to use for that component. Use the Set Spice Model... subcommand of the New Spice Part command of the Edit menu to change the SPICE model of the selected component.
Bipolar transistors have their substrate connected to ground by default. If a Substrate node is encountered, its network will be used for the substrate connection of these transistors instead. The Well subcommand can be used to specify the well network.
Finally, there are three special SPICE nodes that are only for advanced users. The Node Set, Extension, and Special subcommands create nodes which generate special SPICE code. For example, the Extension node produces the SPICE "X" card with whatever text you give it.
![]() | Some nongraphical information can also be given to the SPICE simulator with the SPICE Options... subcommand of the Simulation Interface command of the Tools menu. This dialog allows you to control many of the SPICE deck parameters such as the SPICE format (SPICE 2, SPICE 3, or HSPICE), the SPICE level (1, 2, or 3), whether to use parasitics in the deck, and whether to use actual node names in the deck (SPICE 3 or HSPICE). |
UNIX systems can choose to run SPICE after the deck has been generated. There are five options:
The middle section of the Spice Options dialog controls technology-specific information, which includes header cards (placed at the start of the SPICE deck), trailer cards (placed at the end of the SPICE deck), and parasitic values. Electric has a default set of header cards associated with each technology, and those header cards are inserted into the netlist (so be sure that you are in the proper technology before generating a SPICE deck). This dialog allows you to specify a disk file with header cards or trailer cards to be used instead of the built-in set. You can also edit the built-in header cards for the current technology by using the "Edit Built-in Header Cards" button, which invokes an editing window. See Section 4-10 for more on text editing. The parasitics that can be set include a per-layer resistance, capacitance, and edge-capacitance. You can also set the minimum resistance and capacitance for the entire technology.
The bottom section of the dialog allows you to specify a disk file of SPICE cards that will be used to describe any facet. This disk file replaces the any SPICE description that may be derived from the circuitry.
Once SPICE has been run, you can see a plot of the simulation by reading the SPICE output file back into Electric. Make sure that the SPICE format is properly set (SPICE 2, SPICE 3, or HSPICE) and use the Plot SPICE Listing command to read the file. The waveforms will appear in a window:
The waveform window is tied to an associated schematics or layout window. Clicking on a signal name in the waveform windows highlights the equivalent circuitry in the other window, and clicking on an arc in the schematics or layout window causes the waveform signal to be selected. Both the waveform window and the associated schematics/layout window are highlighted with a red border to indicate that they are part of the simulation activity.
You can do a number of special commands in the waveform window. Two vertical lines are drawn, called the "main" and the "extension" cursors (the extension cursor has an "X" drawn at its top). You can click over these cursors and drag them to different time locations. Type "i" to display the value of the selected signal at the location of the main cursor.
You can control which signals are displayed in the waveform window. To remove a signal, select its name and type "r". When adding a signal, you have a choice of showing it overlaid with an existing signal, or in its own graph. Typing "o" causes the signal to be overlaid, and typing "a" causes the signal to be added in its own graph. If you type "o" or "a" into the waveform window, you will be prompted for a list of signal names to display. If you type "o" or "a" in the assiciated schematics/layout window, then the selected signal from that window will be added to the waveform display.
The time axis of the simulation window can be controlled with the appropriate Windows menu commands. Use Zoom Out and Zoom In to scale the time axis by a factor of two. Use Fill Window to display the entire range of data, fit to the screen. Use Focus on Highlighted to display the range between the main and extension cursors.
Besides the time axis, it is possible to zoom and pan the vertical axis of the waveform window. Typing '7' doubles the scale (zooms-in) and typing '0' halves the scale (zooms-out). Type '9' to restore the scale so that the data fills the screen. Use '8' and '2' to shift the data values up and down.
One final feature is the ability to take a snapshot of the waveform window. Typing "p" preserves the waveform in the database (a facet with the "simulation-snapshot" view is created with artwork components).
Here is a summary of the single-key commands available in SPICE windows:
Show value of selected signal at main cursor | ||
Add signal | Add selected network to waveform window | |
Overlay signal on top of currently selected signal line | Overlay selected network on top of currently selected signal line | |
Remove selected signal | ||
Zoom in vertically (double data scale) | ||
Zoom out vertically (halve data scale) | ||
Scale data to fill the display | ||
Shift data up by 1/4 screen | ||
Shift data down by 1/4 screen | ||
Preserve snapshot of waveform window | ||
Move down the hierarchy (into the selected facet) | ||
Move up the hierarchy (out of the current facet) | ||
Print this listing of single-key commands | Print this listing of single-key commands |
FastHenry is an inductance analysis tool (see the papers of Jacob White). When a FastHenry deck is generated, a subset of the arcs in the current facet are written. To include an arc in the FastHenry deck, select it and use the FastHenry Arc Info... subcommand of the Simulation Interface command of the Tools menu.
This command presents a dialog with FastHenry factors for the selected arc. The most important factor is in the upper-left: "Include this arc in FastHenry analysis". By checking this, the arc is described in the FastHenry deck. Once this is checked, other fields in the dialog become active. You can set the thickness of this arc (the default value shown will be used if no override is specified). You can set the number of subdivisions that will be used in height and width (again, defaults are shown). You can even set the height of the two ends of the arc. | ![]() |
After all arcs have been marked, you can generate a FastHenry deck with the Write FastHenry Deck... subcommand of the Simulation Interface command of the Tools menu. Before doing that, however, you can set other options for FastHenry deck generation To do this, use the FastHenry Options... subcommand of the Simulation Interface command of the Tools menu.
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