Chapter VII: DESIGN ENVIRONMENTS

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5: The MOSIS CMOS Technology

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The MOSIS CMOS technology describes a scalable CMOS process that is fabricated by the MOSIS project of the University of Southern California. To obtain this technology, use the Change Current Technology... command of the Technology menu and select "mocmossub".

Figure 7.2

This technology defaults to 4 metal layers (shown here), but can also be changed so that it uses anywhere from 2 to 6 layers of metal. The technology can also be set to use either standard rules (SCMOS), submicron rules, or deep rules. Also, you can choose whether to allow stacked vias and whether or not to use alternate contact rules. All of this is done with the Technology Options... command of the Technology menu.

Also, the technology can display with "stick figures" by using the Technology Options... command of the Technology menu and checking the "Stick Figures" button in the "MOSOS CMOS" section.

Users of Electric version 6.02 or earlier will have a different MOSIS CMOS technology called "mocmossub". This technology attempted to match the submicron rule set, but did not do so as accurately as the current "mocmos" technology. If you have designs in that technology, they will be automatically converted to the new "mocmos" when read in, unless you uncheck "Automatically convert to new MOSIS CMOS" in the "MOSIS CMOS Submicron (old)" section of the dialog.


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